3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model

Park, JB; Davis, WR; Franzon, PD

Park, JB (reprint author), North Carolina State Univ, Dept Elect & Comp Engn, Raleigh, NC 27695 USA.

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019; 66 (2): 756

Abstract

In this paper, we present 3-D-DATE, a circuit-level dynamic random access memory (DRAM) area, timing, and energy model that models both the front and ......

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