Synthesizable lead-lag quantization technique for digital VCO-based AZ ADC

Wang, J; Cheng, X; Han, J; Zeng, XY

Cheng, X (corresponding author), Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China.

MICROELECTRONICS JOURNAL, 2021; 110 ():

Abstract

This paper presents a synthesizable lead-lag quantization technique for all-digital delta sigma (AZ) analog-todigital converters (ADCs) based on volta......

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