Interconnect Scheme for Die-to-Die and Die-to-Wafer-Level Heteroueneous Inteuration for High-Performance Computing

Das, RN; Bolkhovsky, V; Galbraith, C; Oates, D; Plant, JJ; Lambert, R; Zarr, S; Rastogi, R; Shapiro, D; Docanto, M; Weir, T; Johnson, LM

Das, RN (reprint author), MIT Lincoln Lab, Quantum Informat & Integrated Nanosyst Grp, Lexington, MA 02421 USA.

2019 IEEE 69TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2019; (): 1611

Abstract

Today, microbump-based flip-chip technology is a compelling option for heterogeneous integration in microelectronic packaging. Performance as well as ......

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