A 40-kS/s 16-bit Non-Binary SAR ADC in 0.18 mu m CMOS with Noise-Tunable Comparator

Ito, T; Iizuka, T; Nakura, T; Asada, K

Ito, T (reprint author), Univ Tokyo, Dept Elect Engn & Informat Syst, Tokyo, Japan.

2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2017; ( ): 1

Abstract

A 16-bit non-binary SAR ADC with noise-tunable comparator for low power consumption is presented. A nonbinary-weighted capacitive DAC with redundancy ......

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