RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures

Coluccio, A; Ieva, A; Riente, F; Roch, MR; Ottavi, M; Vacca, M

Vacca, M (通讯作者),Politecn Torino, Dept Elect & Telecommun Engn, I-10129 Turin, Italy.

ELECTRONICS, 2022; 11 (19):