A Time-Interleaved 2nd-Order Delta Sigma Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation

Jiang, DY; Qi, L; Sin, SW; Maloberti, F; Martins, RP

Jiang, DY (corresponding author), Univ Macau, Inst Microelect, State Key Lab Analog & Mixed Signal VLSI, Macau 999078, Peoples R China.

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2021; 56 (8): 2375

Abstract

This article presents a 4x time-interleaved (TI) 2nd-order discrete-time (DT) delta-sigma modulator (DSM). We propose a digital feed-forward extrapola......

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