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FORMAL METHODS IN SYSTEM DESIGN

出版年份:暂无数据 年文章数:703 投稿命中率: 开通期刊会员,数据随心看

出版周期:Bimonthly 自引率:3.0% 审稿周期: 开通期刊会员,数据随心看

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703
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The focus of this journal is on formal methods for designing implementing and validating the correctness of hardware (VLSI) and software systems. The stimulus for starting a journal with this goal came from both academia and industry. In both areas interest in the use of formal methods has increased rapidly during the past few years. The enormous cost and time required to validate new designs has led to the realization that more powerful techniques must be developed. A number of techniques and tools are currently being devised for improving the reliability and robustness of complex hardware and software systems. While the boundary between the (sub)components of a system that are cast in hardware firmware or software continues to blur the relevant design disciplines and formal methods are maturing rapidly. Consequently an important (and useful) collection of commonly applicable formal methods are expected to emerge that will strongly influence future design environments and design methods. The journal is an international forum for the dissemination of research related to the application and development of formal methods in both hardware (VLSI) and software system design. Papers describing original work in all aspects of formal methods as they relate to this general area are invited.